Team

The people and partners behind hardware-enforced AI safety.

The Foundation
Ibrahim Vandenberg

Ibrahim Vandenberg

Founder & Chief Architect

Creator of the Evrmind Architecture. 26 patent families. 3 published papers. TRL 6 validated on physical silicon. Self-taught systems architect and award-winning commercial operator. Identified the gap between software guardrails and real hardware enforcement, and built the enforcement block independently.

Numan Cheema

Numan Cheema

Max Acsinia

Max Acsinia

Vivarium Labs

Early Technology Partner & Venture Studio

Software Engineering, Commercial Execution, Operational Scale & Procurement. Team of 15+ engineers.

Joining at Close

Chief Engineer

20+ years across ARM, Intel, and Imagination Technologies. Secure silicon architecture.

Lead Cryptographer

Post-quantum cryptography and fully homomorphic encryption. Ex-Optalysys. PhD Royal Holloway.

Advisory Board
Chip Advisory

Former leads from major EDA, semiconductor and security companies

Hardware Architecture and Verification
Business Execution

Innovation and commercialisation advisory

Deep Tech Go-to-Market
Research Advisory

University of Liverpool

Topological Mathematics
Research Advisory

Autonomous Intelligence and AI Safety

Post-Quantum Cryptography and FHE
Development Partner

Axiomise

Formal Verification
Development Partner

NextGen Circuits

FPGA Specialists
Research Partnership

Research Partnership with Prof. Vitaliy Kurlin, University of Liverpool (Topological Data Analysis). Advisory board spans backgrounds from Synopsys, ex-Graphcore, Intel, ARM, Broadcom, Cadence, Optalysys, Plexal, and a Yann LeCun co-author.